200 Mips (overclock) Vampire | page 1 2 3
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| | Dawid 1983
Posts 29 29 Sep 2021 17:41
| I was thinking to Edit core file and flash with usb blister 💡 Maybe this way. Proper software will be better from os level this will be awesome tool 😀
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| | Matthew Langtry
Posts 199 29 Sep 2021 20:24
| I think we have to unfortunately flash faster cores and sometimes going faster means losing stability.
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| | Richard Statham
Posts 50 29 Sep 2021 21:26
| If say we had the funds to make it into a ASIC tommorow what kind of speed would it run at then ?
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| | Tim Trepanier
Posts 135 29 Sep 2021 21:52
| Richard Statham wrote:
| If say we had the funds to make it into a ASIC tommorow what kind of speed would it run at then ?
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This questions seems to asked in every thread of every Amiga/Vampire related forum. Typically, an ASIC would run at about 10 times the clock speed of the FPGA design. This is a sweet spot where you get the most bang for your buck. Extra money for further development, higher resolution lithography, heat dissipating measure, etc... can push the speed higher but spending more gets you less and less of a speed increase.
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| | Gunnar von Boehn (Apollo Team Member) Posts 6258 29 Sep 2021 22:32
| Tim Trepanier wrote:
| Richard Statham wrote:
| If say we had the funds to make it into a ASIC tommorow what kind of speed would it run at then ? |
Typically, an ASIC would run at about 10 times the clock speed |
Yes this is correct.The 68080 is fully pipelined, similar design to it reach as ASIC 1.4 to 2.0 GHz. So something like "3000-4000" Sysinfo Mips ;-) Our goal is to revive Amiga. Our goal will be to go to Asic. But first we need your help to increase Amiga /Vampire user base. We need together start coding new Amiga software. Lets together revive the Amiga
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| | Dawid 1983
Posts 29 29 Sep 2021 22:35
| will be nice to see OC in future on this boards. Some people can install aftermarket cooling as well.
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| | Kamelito Loveless
Posts 261 30 Sep 2021 13:19
| We need to know what software the users are willing to buy. If you go ASIC will it be to make money in the embedded systems market if so then what will be the benefits for the users? Or is it just to develop the Amiga?
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| | Amiga Digital
Posts 7 30 Sep 2021 21:53
| Gunnar von Boehn wrote:
| Vampire V4 (overclocked) Running at x16 == 113 MHz
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wow nice that speed , when will come the update , i like to run myn vampire v4 to 133mhz , maybe myn bbs wil run beter with the uploads
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| | Dawid 1983
Posts 29 30 Sep 2021 22:18
| x10 x11 x16 is this the multipler ? just thinking if so why not make the feature for everyone.
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| | Nick Fellows
Posts 180 07 Oct 2021 19:03
| "Our goal will be to go to Asic" How far away is this goal and what steps are involved to get there? This is an amazing aspiration.
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| | Ville Helin
Posts 9 07 Oct 2021 22:04
| nick fellows wrote:
| "Our goal will be to go to Asic" How far away is this goal and what steps are involved to get there? This is an amazing aspiration. |
Going ASIC with Vampire would definitely break the news headlines' threshold. At that point software would be so much lagging behind the hardware... It's funny. Back in the good old times Amiga inc. didn't deliver good enough hardware in the end times, but there was software. Now post mortem team Apollo is delivering great Amiga hardware in the year 2021+, but the software is lacking... Going ASIC would just be simply unheard of. As an old Amiga ASM programmer (Wzonka-Lad and some demos and stuff) I'm still making builds of my ANSI C cross assembler package WLA DX for Amiga, and soon my C-like cross compiler SameSameC will work on Amiga (need to make it public fisrt) as well, just for the fun of it. As the number of my personal projects that can be built for Amiga continues to grow I'm more and more inclined to buy V4+. And I'm telling more and more people about Vampire. And I'm a bit tipsy right now, too many beers while coding new stuff. Today adding new stuff to one of my old Flash/AS3 games. Retro rules! Anyway, just loving the Amiga spirit here! Please carry on! :D
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| | Gunnar von Boehn (Apollo Team Member) Posts 6258 08 Oct 2021 09:51
| Dawid 1983 wrote:
| x10 x11 x16 is this the multipler ? just thinking if so why not make the feature for everyone.
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Our focus is clearly to make very stable and well tested releases. You have to know that making a release take a lot time, its several weeks full time work needed per card model! Unfortunately its not like baking pancakes, where you can quickly make one extra. We need to plan the release and then work on it for a significant time. Our plan for this year is to make releases/updates for all models. With focus on stable (default speed) - maybe we are also able to make an optional "fun" release with higher 190-200 Mips speed.
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| | Nick Fellows
Posts 180 08 Oct 2021 17:14
| "for all models" including the V1200 ? If so wowzers and if using this core would it be wise to install heatsinks ?
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| | Gunnar von Boehn (Apollo Team Member) Posts 6258 10 Oct 2021 09:51
| nick fellows wrote:
| "for all models" including the V1200 ?
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We spoke of course about all V4 models (V4-Standalone, V4-Firebird, V4-Icedrake). The V2 models use an older FPGA model. The V2 default clockrate is x11. The V1200 is with x12 already on the higher end for the V2.
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| | Thierry Atheist
Posts 644 16 Oct 2021 11:02
| So, Gunnar, Did you do 1920x1080??? Vampire RULEZ!!!!!!!!
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| | Pete Morgan
Posts 22 29 Mar 2022 16:53
| Edit: Nevermind, daft question.
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| | Thierry Atheist
Posts 644 14 Sep 2022 12:49
| So, what is the chance of going ASIC now?? I'm sure that MANY would be able to put in $100 and $200 up to the cause. Since it's possible to get SO MANY transistors into an IC.... Is it better to make a tiny CPU...... OR How about SCRAPPING L1, L2 and L3 cache, and put 1 Gigabyte of RAM INSIDE the CPU!!!!!! A low powered 68060 could even possibly used for a tablet or cellphone!!!
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| | Roy Gillotti
Posts 524 14 Sep 2022 17:11
| How about SCRAPPING L1, L2 and L3 cache, and put 1 Gigabyte of RAM INSIDE the CPU!!!!!! |
Not many companies have the capability of manufacturing DRAM memories directly on chip along with the rest of the ASIC, IBM Microelectronics used to be able to do this with their fab processes down to 32nm, but they sold their fabs and technologies to GlobalFoundries who basically stopped doing anything in that realm, it was too complicated for them, so they just phased it out of their future designs. SRAM caches are easier to manufacture as they don't require complicated trenching methods, but they do take up more space on the chip. Intel has the poor man's version that just uses an external DRAM encapsulated on a substrate next to the processor, I guess it shortens the path a little, but seems a bit of a party trick.
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| | Don Adan
Posts 38 15 Sep 2022 00:46
| Perhaps the easiest (?) way for ASIC, will be using eASIC from Intel. Seems to be not very expensive. EXTERNAL LINK 16 nm? ASIC EXTERNAL LINK
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