Operation: Source * Destination -->; Destination
Assembler Syntax:
MULU.W <ea>, Dn 16 x 16 -->; 32
MULU.L <ea>, Dl 32 x 32 -->; 32
MULU.L <ea>, Dh:Dl 32 x 32 -->; 64
Attributes: Size = (Word, Long)
Description: Multiplies two unsigned operands yielding an
unsigned result. This instruction has a word operand form
and a long-word operand form.
In the word form, the multiplier and multiplicand are
both word operands, and the result is a long-word operand.
A register operand is the low-order word; the upper word
of the register is ignored. All 32 bits of the product are
saved in the destination data register.
In the long form, the multiplier and multiplicand are both
long-word operands, and the result is either a long word or
a quad word. The long-word result is the low-order 32
bits of the quad word result; the high-order 32 bits of the
product are discarded.
Condition Codes:
X Not affected.
N Set if the result is negative. Cleared otherwise.
Z Set if the result is zero. Cleared otherwise.
V Set if overflow. Cleared otherwise.
C Always cleared.
Note: Overflow (V = 1) can occur only when multiplying 32-bit
operands to yield a 32-bit result. Overflow occurs if the
high-order 32 bits of the quad-word product are not the
sign extension of the low-order 32 bits.