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68000 -> 64bits

Counia .

Posts 4
26 Apr 2016 15:46


Hello,
first nice hope you offert to my 7MHz Amiga :-)

Since a few days, i read posts on this forum and interesting info go in the right direction but doubts by my english comprehension.
I know litle 68000 pure, not 10/20 etc...

For clarifie processor go to 64bits.
*all data registers up to 64bits (D0 - D7)? (
*repercussion on logical and aritmetic instructions work on 64bits now ?
  (hardware algorithme are the same with 32 bits wide?) 
  (ex:Mul instruction now 32*32->64 or 64 with an overflow or expenssion to 128)
*CC register ; branch instructions use signe and overflow ; extend instruction with "X" bit (ex:RoXl) go to 64bits ?
*data-bus too ? (64bits register read/write in only 1 access ?)
*Pass 24bits adress(trivial with 32bits memory), but register and bus are 32 bits or extend litle too(1 or 2 bits)?
*New instructions, (i see MMX) , but more 68k, ex:swap 32.H<->32.L exist ?
*Instructions already in use: subject to modification (syntax/opcode)?
 
What repartision between Amiga chipset ans S-AGA ?
*Adress range totaly independant ?
*All OCS/ECS registers exist in double with Vampire card ?)
*copper-list on Amiga and copper-list on Vampire ?)
*both video-out possible in same time ?
*possibility duplicate Amiga-Chip-MEM(video segment) to Vampire-MEM and out data with other freq.h freq.v ? 

Thanks for any info.


Samuel Crow

Posts 424
26 Apr 2016 16:11


Counia . wrote:

  Hello,
  first nice hope you offert to my 7MHz Amiga :-)
 
  Since a few days, i read posts on this forum and interesting info go in the right direction but doubts by my english comprehension.
  I know litle 68000 pure, not 10/20 etc...
 

  Greetings!
 
Counia . wrote:

  For clarifie processor go to 64bits.
  *all data registers up to 64bits (D0 - D7)? (
 

  Yes register are 64bit.

 
Counia . wrote:

  *repercussion on logical and aritmetic instructions work on 64bits now ?
    (hardware algorithme are the same with 32 bits wide?) 
    (ex:Mul instruction now 32*32->64 or 64 with an overflow or expenssion to 128)
 

The ALU support 64bit operation.
So YES, AND/ADD/SHIFT can do 64bit per instruction.
Also the MMX instructions process 64bit per instruction.

 
Counia . wrote:

  *CC register ; branch instructions use signe and overflow ; extend instruction with "X" bit (ex:RoXl) go to 64bits ?
 

Yes, 64bit instructions could set flags.
 

 
Counia . wrote:

  *data-bus too ? (64bits register read/write in only 1 access ?)
 

Yes.
64bit register are read/written in single cycle.
And also Cache-Read/Write does 64bit in single cycle.
APOLLO memory interface can also do this.

 
Counia . wrote:

  *Pass 24bits adress(trivial with 32bits memory), but register and bus are 32 bits or extend litle too(1 or 2 bits)?
 

  I don't think so.  What do you mean?
 
Counia . wrote:

  *New instructions, (i see MMX) , but more 68k, ex:swap 32.H<->32.L exist ?
 

  There are some specialist instructions like EXT.Q
  But PERM is universal too.
  PERM $45670123,d1,d1 ; swap high and low long word in d1

 
Counia . wrote:

  *Instructions already in use: subject to modification (syntax/opcode)? 
 

  We have defined a number new instruction.
  The 64-bit ops are in use in some programs we are working on.
  If we see ways to improve them more we might change these new instructions.
  Therefore peoples input here will help too.

 
Counia . wrote:

  What repartision between Amiga chipset ans S-AGA ?
  *Adress range totaly independant ?
  *All OCS/ECS registers exist in double with Vampire card ?)
 

  SAGA overlays original chipset.
  SAGA is inherited from NATAMI.
  SAGA is currently not fully activated in Vampires.

 
Counia . wrote:

  *copper-list on Amiga and copper-list on Vampire ?)
  *both video-out possible in same time ?
  *possibility duplicate Amiga-Chip-MEM(video segment) to Vampire-MEM and out data with other freq.h freq.v ? 
 

  In theory you could run SAGA as "clone".
  Which is nice to compare the output.

 
Counia . wrote:

  Thanks for any info.
 

  You're welcome.


Counia .

Posts 4
28 Apr 2016 01:06


Yes ... I think you revolutionize the 68000.
  I hope you reconcile Amiga with the Moore law ;-)
 
  I read the instruction page for description, some 404.
  Good job !


Gregthe Canuck

Posts 274
28 Apr 2016 06:11


Hi Counia -

Yes it is very exciting watching the next-generation 64 bit 68060 successor take shape.

There is no other project like this out there. Very cool stuff. :)


Samuel Crow

Posts 424
28 Apr 2016 12:54


It looks like Gunnar improved the accuracy of my response!  Thanks, Gunnar!


Nadyr Nick

Posts 54
28 Apr 2016 13:55


gregthe canuck wrote:

Hi Counia -
 
  Yes it is very exciting watching the next-generation 64 bit 68060 successor take shape.
 
  There is no other project like this out there. Very cool stuff. :)

It's the best AMiGA project seen in last 15 years; I hope see this great improvement also in "AGA/AAA/SAGA chipsets".
Thanks to all involved in this project


Counia .

Posts 4
29 Apr 2016 22:58


Sorry for my curiosity !
When you tell "SAGA overlays original chipset".
I comprehend if adress "original or Amiga" chipset, destination will be not in Denise/Agnus etc... but in Vampire SAGA-register ?
If correct, when an adress-register is on the bus, how prevent adress-decoder to valid the Amiga-chipset ?


Samuel Crow

Posts 424
30 Apr 2016 15:58


Counia . wrote:

Sorry for my curiosity !
  When you tell "SAGA overlays original chipset".
  I comprehend if adress "original or Amiga" chipset, destination will be not in Denise/Agnus etc... but in Vampire SAGA-register ?

Yes.
Counia . wrote:

  If correct, when an adress-register is on the bus, how prevent adress-decoder to valid the Amiga-chipset ?

It is probably similar to the way that Kickstart remapping circuits make a Kickstart ROM image copy to Fast RAM but then makes it look like it's still at the same address in the memory map.


Counia .

Posts 4
30 Apr 2016 23:33


I never really looked the remapping-ROM ; an quick idea for this mecanism, an independent logic can modify vector table to ROM-image(in Fast-RAM or any address).
  But with SAGA i think more complex mechanism (share/cross access of different logics).

posts 9