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Since AROS Approaches SMP - Can Apollo Do MP?page  1 2 

Vojin Vidanovic

Posts 770
05 Jun 2017 22:52


I do understand real multi-threaded multi-core CPU thing is not easy to implement is equal challenge to MOS, OS4 and AROS, with AROS x64 as only success case.
   
    Another DSP-age old technology before there was simply a multiple CPU board. More complex, more sockets, separate memory banks and some kind of parallelism that wasnt exactly multithreading and real time, but splitting the tasks and returning results (like CPU+DSP I used to nag somehwere else). And it worked. And didnt need that complicated solutions. Surely benefit wasnt as x2 same CPU, isnt with SMP with x2 cores, isnt in multithreading by simple multiply ... but was at least 30% better then single CPU and was just for people that really needed extra horsepower.
   
    Could that be implemented in fast CPU + faster DSP or two fast CPUs mode, once needed on 68k? Some kind of hardware bus scheduling and exec that can respond to the task is all that should be needed?


Gunnar von Boehn
(Apollo Team Member)
Posts 6207
06 Jun 2017 00:43


Vojin Vidanovic wrote:

Could that be implemented in fast CPU + faster DSP or two fast CPUs mode, once needed on 68k? Some kind of hardware bus scheduling and exec that can respond to the task is all that should be needed?
 

     
So you mean like a motorbike with 2 motors?
One engine powering the front wheel and one powering the rear wheel?
I wonder why they not build motorbikes like this. ;-)
   
I have no doubt you have the best intension.
But you significantly misunderstand the situation.
Those "constructs" to build a system + DSP were never easy to program. And they were always only done by people which could not build a CPU.
 
They could not improve the CPU. 
So what could they do?
 
Their only options was to create much more complex system for the programmers and an extra core or extra DSP - because they lacked the skill to improve their main core.
So their solution was much harder to code for, and had the potential to cause more crashes and problems for the users.
 
We are in much better position.
We do have the option and the skill to improve the main CPU.

 
Improving the main CPU will benefit all programs without adding new programming hazards of multicore systems.
 
Therefore improving the main CPU is the much better solution - if you can do it.


Wawa T

Posts 695
06 Jun 2017 01:34


excellent explanation.


E Penguin

Posts 46
06 Jun 2017 16:09


Gunnar von Boehn wrote:

  Those "constructs" to build a system + DSP were never easy to program. And they were always only done by people which could not build a CPU.
 

Look at the Sega Saturn - loads of parallel processing special chips, and a nightmare to program.


Vojin Vidanovic

Posts 770
06 Jun 2017 18:42


Yes, 3DO, Jag and Sega Saturn were all mess.
But some concepts like Falcon were quite a success.

I agree, its easier to have good CPU and chipset around.

So I am eager to hear one morning to what Mhz standalone will scale
from current 70-90Mhz range thanks to more FPGA space on Cyclone V :-)


Cyber Gorf
(Needs Verification)
Posts 39/ 1
10 Jun 2017 20:41


I hope Kalamatee will be able to continue his work on Aros and SMP in future. Losing him would be quite a setback. :-/
 
  Meanwhile I have an interesting read, how a lock-free multiprocessor kernel can be implemented - for 68k processors! Henry Massalin (now Alexa) created his/her Synthesis-kernel 1991 in 68k-assembler. Without spin-locks and non-blocking, taking advance of the Double compare-and-swap (DCAS or CAS2) Instructions.
  This was done on a Sony dual-68030 workstation.
  Here is the paper:
 
  http://web.cecs.pdx.edu/~walpole/class/cs510/papers/06.pdf


Xan X-vision
(Needs Verification)
Posts 35/ 1
10 Jun 2017 23:17


Cyber Gorf wrote:

I hope Kalamatee will be able to continue his work on Aros and SMP in future. Losing him would be quite a setback. :-/
 
  Meanwhile I have an interesting read, how a lock-free multiprocessor kernel can be implemented - for 68k processors! Henry Massalin (now Alexa) created his/her Synthesis-kernel 1991 in 68k-assembler. Without spin-locks and non-blocking, taking advance of the Double compare-and-swap (DCAS or CAS2) Instructions.
  This was done on a Sony dual-68030 workstation.
  Here is the paper:
 
  http://web.cecs.pdx.edu/~walpole/class/cs510/papers/06.pdf

This looks awesome


Gunnar von Boehn
(Apollo Team Member)
Posts 6207
11 Jun 2017 01:08


Cyber Gorf wrote:

Meanwhile I have an interesting read, how a lock-free multiprocessor kernel can be implemented. - for 68k processors!

Of course it can.
This goes without saying.

But lets not create false expectations.
For AMIGA this is not what you want and not what you urgent need.




Cyber Gorf
(Needs Verification)
Posts 39/ 1
11 Jun 2017 01:32


Gunnar von Boehn wrote:

Cyber Gorf wrote:

  Meanwhile I have an interesting read, how a lock-free multiprocessor kernel can be implemented. - for 68k processors!
 

  But lets not create false expectations.

I understand your concern. I am aware there will be no multiprocessing for vampire in near future. Maybe never. And everybody reading this thread should know this


  For AMIGA this is not what you want and not what you urgent need.

Is there ANY urgent need at all? probably not...

But why is this not what I want? I am pretty sure I do want this  ... ;-)

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