Overview Features Coding ApolloOS Performance Forum Downloads Products Order Contact

Welcome to the Apollo Forum

This forum is for people interested in the APOLLO CPU.
Please read the forum usage manual.
Please visit our Apollo-Discord Server for support.



All TopicsNewsPerformanceGamesDemosApolloVampireAROSWorkbenchATARIReleases
Information about the Apollo CPU and FPU.

Comparing RISC and CISC

Gunnar von Boehn
(Apollo Team Member)
Posts 6214
16 Jan 2016 17:04


Several people did ask for in IRC for an comparison of RISC and CISC.

Ok lets make some simple example...

Here are two 68 Instructions


ADDI.L #$12345678,(A0)
ADD.L  #$87654321,D0

A good CISC CPU can execute these 2 instructions together in a single cycle.

To do the same work a RISC CPU like the POWERPC needs several instructions.
There are 2 ways to code this in POWERPC, one involves more instructions, the other will need more memory reads.
1) Solution needs 8 instructions and 1 memory read and 1 write
2) Solution needs 6 instructions and 3 memory read and 1 write.

As you can see the POWERPC needs a lot more instructions then the 68K to do the same amount of work.
The 603 can execute 2 instructions per cycle.
This means the 603 needs 4 clockcycle to do the same amount of work as the APOLLO does in 1 cycle.

With code like the above a 100 MHz APOLLO does the work as an PowerPC 603 @ 400 Hz.

Now this example was only with 32bit.

Apollo supports 64bit at the same speed.
This means Apollo can even do twice the amount of work per clock using 64bit instructions.

The PowerPC603 is just 32bit.
This means using 64bit code like the above as 100 MHz APOLLO can do as much work as a POWERPC 603 at 800 MHz.



posts 1