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68080 (680xx Vs X86)page  1 2 

Vojin Vidanovic

Posts 1731
16 Oct 2020 22:36


Örjan Olofsson wrote:

    Would it be possible to get Motorola on board (fun intented) somehow?
 

 
  Hardly, FreeScale is now PowerPC producer, and has only legacy ColdFire chips which arent fully backward compatibile.
 
  Yes, XT is 8086, AT class PCs are 286 and onward (original IBM designations)
  EXTERNAL LINK   
  In Amiga 1000 days, there was Amiga sidecar, making it XT compatibile.
  EXTERNAL LINK 
 
Örjan Olofsson wrote:

  Would that have saved Amiga from following Apple along the PPC route? Or rather just postponed it?
      My second, sad question, is if Commodore eventually had ended up using Intel the way Apple did? :-(
 

 
  No, Motorola joined PowerPC coalition alongside Apple and IBM to develop new RISC CPU, known as PowerPC. There were no plans after 68060. 68080 is first real development since.
 
  CBM did sell PCs, as well as ESCOM, but since they saw 68060 is end of line, they planed of using PA RISC CPU which had a good performance back in those days (as Next gen Amiga)
  EXTERNAL LINK 
  Amiga PowerPC transition was carried out after by Phase 5 and Escom-Amiga Inc-Hyperion plans, CBM never planned even that.
 


Gunnar von Boehn
(Apollo Team Member)
Posts 4964
17 Oct 2020 07:29


Örjan Olofsson wrote:

Would that have saved Amiga from following Apple along the PPC route? Or rather just postponed it?
   
My second, sad question, is if Commodore eventually had ended up using Intel the way Apple did? :-(

If you look at CPUs then you can see two different architectures.
CISC and RISC.

CISC are CPUs which support "complex" instructions, they are designed to make coding easy.
RISC are the opposite, they "lack" complex instruction and they lack "comfortable" address modes. There design goal is NOT to make coding easy but to be easier to produce for the HW manufacturer.

If you look as programmer on a CPU then a CISC CPU "offers" you a complex instructions set. The instruction set is like a language.
A complex instruction set offer many "verbs and nomen" for all types of things you want to express.
A "Reduced" instruction set offers much less for the programmer.

Lets try to use an example to illustrate this.
Lets say "english" is CISC and you want to say this sentence.
"Yesterday, I was sitting in the garden under the tree"
This is easy to express in english, and very natural.
Writing this in RISC will look more like this.
"Day before today, I stand not up, where thing outside house, under the thing with things on branch"

RISC instruction set lack a lot what CISC instructionssets have.
This makes "writing" in these very clumsy and very hard to write and very hard to read.


Lord Aga
(Apollo Team Member)
Posts 112
17 Oct 2020 09:04


So basically, RISC programming is Biden-talk :)


Vojin Vidanovic

Posts 1731
17 Oct 2020 15:06


Gunnar von Boehn wrote:

  RISC instruction set lack a lot what CISC instructionssets have.
  This makes "writing" in these very clumsy and very hard to write and very hard to read.

Thanks for clarification, easy and with nice example.

So while RISC offered better performance *or easier higher clocking due to less complexity, it made coders life worse :)

So hope we still have generation of CISC programmers around,
68080 might as well be best CISC processor around.


Örjan Olofsson

Posts 9
17 Oct 2020 16:48


Vojin Vidanovic wrote:

    CBM did sell PCs, as well as ESCOM, but since they saw 68060 is end of line, they planed of using PA RISC CPU which had a good performance back in those days (as Next gen Amiga)
    EXTERNAL LINK     
    Amiga PowerPC transition was carried out after by Phase 5 and Escom-Amiga Inc-Hyperion plans, CBM never planned even that.
   

   
  I knew about the last part, I remember being excited about an Amiga PPC G3 card about to happen, but I
  never bought any PPC card for Amiga. I did get a 68040 card for my Amiga 1200 a long time ago :)
   
  The first part about Commodore planning using RISC is something I'd forgotten about.
   
   
Gunnar von Boehn wrote:

    Lets try to use an example to illustrate this.
    Lets say "english" is CISC and you want to say this sentence.
    "Yesterday, I was sitting in the garden under the tree"
    This is easy to express in english, and very natural.
    Writing this in RISC will look more like this.
    "Day before today, I stand not up, where thing outside house, under the thing with things on branch"
   

   
I guess everyone on here have figured out I'm not a programmer ;) I know about 680xx being CISC and
PPC being RISC, but you gave a very pedagogic example :)
   
   
Lord Aga wrote:

    So basically, RISC programming is Biden-talk :)
   

   
  :)
   
   
Vojin Vidanovic wrote:

   
    So hope we still have generation of CISC programmers around,
    68080 might as well be best CISC processor around.
   

   
  Aren't x86 and x64 CISC too?
   
   
  Anyway, 68080 is nice and giving new life to our beloved machine, going PPC like Apple would have given
  programmers a hard time, and hit a dead end eventually.
   
  Is x64 the only alternative for today's high end gaming computers?


Vojin Vidanovic

Posts 1731
17 Oct 2020 17:09


Örjan Olofsson wrote:

  Aren't x86 and x64 CISC too?

I believe since Pentium Pro its RISC.
It used to be CISC in XT to Pentium era.

Backward code compatibility instruction set is preserved, but architecture significantly changed over time.


Henrich Raduska

Posts 38
17 Oct 2020 18:39


It is RISC within CISC.
  Applications use CISC x86 / x64 instructions, which are internally (invisible to users) translated into several RISC instructions, which are then executed.
EXTERNAL LINK


Gunnar von Boehn
(Apollo Team Member)
Posts 4964
17 Oct 2020 21:43


Örjan Olofsson wrote:

  Aren't x86 and x64 CISC too?

Yes CISC are:
x86, 68k, pdp11, vax

RISC are
PPC, Arm, Sparc, Mips


Aldrin O.

Posts 28
18 Oct 2020 00:33


An instruction set with the advantage of CISC and RISC would be the best. Sci-fi though maybe.

Some people are currently experimenting on this:
EXTERNAL LINK


Gunnar von Boehn
(Apollo Team Member)
Posts 4964
18 Oct 2020 06:20


Aldrin O. wrote:

An instruction set with the advantage of CISC and RISC would be the best.

     
Don't let yourself fooled by marketing nonsense of companies.

CISC is generally the better for performance and better to program.
The advantage of RISC is mainly that its easier and cheaper to produce for the HW company.
   
   
CISC is like playing a stratiwari violin.
While RISC is tuned for "cheapness" like a plastic flute.
   

 


Captain Zalo

Posts 70
18 Oct 2020 23:05


Gunnar von Boehn wrote:

CISC is like playing a stratiwari violin.
While RISC is tuned for "cheapness" like a plastic flute.
 

Beautiful analogy.
CISC is Lego Technic. RISC is Fisher Price.

RISC is very power efficient because of less complexity, but apart from that CISC basically mops the floor with RISC.


Aldrin O.

Posts 28
18 Oct 2020 23:26


Captain Zalo wrote:

     
Gunnar von Boehn wrote:

      CISC is like playing a stratiwari violin.
      While RISC is tuned for "cheapness" like a plastic flute.
       
     

     
      Beautiful analogy.
      CISC is Lego Technic. RISC is Fisher Price.
     
      RISC is very power efficient because of less complexity, but apart from that CISC basically mops the floor with RISC.
     

     
  Why not have a power efficient/less complex/easier to produce yet being also easier to program/have good performance then?
   
  Maybe for a ISA designer that sounds crazy, but shouldn't that be the ideal ISA of all ISA designers? I mean why limit to being categorize by the two?
 
  I'm guessing it is not realistic for companies like Intel, AMD, etc. to go with a new ISA because of all the compatibility issues that will happen hence why I only see researchers/hobbyist experimenting on this. Maybe 68k still has some room for having advantage of both?


Aldrin O.

Posts 28
19 Oct 2020 00:01


Gunnar von Boehn wrote:

 
Aldrin O. wrote:

    An instruction set with the advantage of CISC and RISC would be the best.
   

       
    Don't let yourself fooled by marketing nonsense of companies.
   
 

 
  Well, for me at least I don't see companies claiming RISC is better to program/better performance than CISC. It's more about RISC being more power efficient than CISC hence why I see ARM instead of x86 on smartphones.
 
  Since I'm not a CPU designer, I want to get your opinion on this one statement I copied on the link I gave.
 
 

  The ForwardCom instruction set is neither RISC nor CISC, but a new paradigm with the advantages of both. ForwardCom has few instructions, but many variants of each instruction. A consistent template system with few instruction sizes combines the fast and streamlined decoding and pipeline design of RISC systems with the compactness and more work-done-per-instruction of CISC systems.
 

 
  Since I know you are a CPU designer, I want to get your opinion on this statement. Do you agree/disagree with what is stated about RISC and CISC?


Gunnar von Boehn
(Apollo Team Member)
Posts 4964
19 Oct 2020 07:27


Aldrin O. wrote:

Well, for me at least I don't see companies claiming RISC is better to program/better performance than CISC.

Correct.
Very clearly CISC and especially 68K-ISA are nicer to program.
 
For performance the formula is:
  - How many operations can 1 instruction do
  - How many instructions can you execute/decode in parallel
  - How well pipelined is your core
  - How little bubbles /dependencies do you have
  - How much data can your alu process(width)
  - How good are your caches
  - How good is your branch prediction
 
Aldrin O. wrote:

It's more about RISC being more power efficient than CISC hence why I see ARM instead of x86 on smartphones.

 
Nope this is not the reason. That truth is just ARM is cheap.
Powerconsumption is very simple defined by how much "work" is done by a chip and how much effort is done inside the chip.
 
As better and more complex your Icache is as more power it will drawn
As more complex your decoder is as more power it will draw.
As better your register set is as more power it will draw
As better your branch prediction is as more power it will draw
As better and more complex your DCache is as more power it will draw
As stronger and more powerful your EA units are as more power they will draw.
As stronger and more powerful your ALUs are as more power they will draw
As better your memory controller is as more power it will draw.
As better your clock-gating is as less power your core will draw.
 
 
Its true that the ARM decoder is simpler than the X86 decoder.
But this is just a mini factor in the whole.
So ARM has here a micro advantage of a few percent - in the whole power consumption summery.
INTEL clockgating was always much better than ARMs and because of this INTEL CPUs are much power-efficient than ARM.
 

In reality the x86 Cores have much stronger caches, much better branch predictions, much stronger ALUS, better memory controllers = they are much more powerful chips.
 
When you compare a PORSCHE with a FIAT PANDA... then the PORSCHE needs more fuel - simply because it has a much stronger and bigger engine and is a bigger car.
 



Saladriel Amrael

Posts 148
19 Oct 2020 08:49


That's interesting to read... as it goes against all I have heard from the 16 Bit era:
 
  When the Acorn Archimedes came out, I red almost everywhere that
  his computing power was so high compared to even a 020 Amiga because of it's RISC CPU.
 
  So that must have been something else...


Gunnar von Boehn
(Apollo Team Member)
Posts 4964
19 Oct 2020 09:03


Saladriel Amrael wrote:

That's interesting to read... as it goes against all I have heard from the 16 Bit era:
     
When the Acorn Archimedes came out, I red almost everywhere that
his computing power was so high compared to even a 020 Amiga because of it's RISC CPU.
     
So that must have been something else...

 
The truth is simple
The formular to performance is as explained above.
 
A RISC CPU always has a disadvantage with "operations per instruction" and this can never be cured.
 
For the hardware developer the RISC makes it easier to pipeline it. This means you need much less brain power as hardware designer to fully pipeline a RISC ISA.
The 020 was not fully pipelined, this was it disadvantage.
   
A CISC ISA requires more "thinking" for the HW engineer.
We did this "thinking" for the 68080 - the 68080 is 100% pipelined and easily beats the ARM.
   
RISC ISA makes is "easier" for the HW guys to produce a CPU.
   
You can compare a RISC CPU with a Bicycle - and a CISC CPU with a Motorbike.
Yes its much easier and cheaper to produce a Bicycle.
Yes the very first Motorcycle was maybe even slower than a Bicycle.

But today Motorbikes are a lot more powerful and much faster than Bicyles.
 
There was a time in the 80th when the HW companies did not figure out how to optimally pipeline CISC designs.
At that time in the early 90th the RISC was a "cheat" which allowed hardware companies to easily pipeline their cores - and this gave RISC an edge for a few years (only).
 
As soon INTEL, us and others learned how to optimally pipeline a CISC architecture - CISC is leading again.


Saladriel Amrael

Posts 148
19 Oct 2020 10:30


Thanx Gunnar, this is a nice thing to learn


Michael Piano

Posts 5
20 Oct 2020 17:20


Gunnar,

I know this is question is ahead of the game but is the 68080 now the end of the line for 68k? Since it's an FPGA, is a V5 waiting on a better performing FPGA model? Maybe something a little faster that makes it worth an increased version, 68090 or 68100.

This is more for curiosity's sake than a concrete time table. We have an A1000 and then A2000 with 8MB of RAM and a 10MB hard drive. I'm still learning the history, etc. I just wish I hadn't tossed the A2000 and thousand of games several years ago. I didn't know there were still communities out there.

::bows head in sadness::

 


Vojin Vidanovic

Posts 1731
20 Oct 2020 22:41


Saladriel Amrael wrote:

      When the Acorn Archimedes came out, I red almost everywhere that
      his computing power was so high compared to even a 020 Amiga because of it's RISC CPU.
   

   
    Its a RISC processor, ARM2 not highly clocked but seems it was build for efficiency, both per Mhz and power efficiency, simple,cheap and cashless. Design since day one. And Big Gun gave you all the tech details :)
   
    Wiki history claimed its 6502 on Steroids
    https://en.wikipedia.org/wiki/ARM_architecture#Acorn_RISC_Machine:_ARM2
   
    Who would think ARM would rule the world once simple, power efficient and not so highly clocked CPU was needed for handheld devices known now as smartphones and tablets?
 
 
Michael Piano wrote:

  I know this is question is ahead of the game but is the 68080 now the end of the line for 68k?
 

 
  68060 is official EOL, so 68080 is "another Vampire" :)
So is question will Big Gun design new CPU? I dont know, but seems its unnecessary, 080 needs just more FPGA space for Mhz / and that is V4 now. Silicon maybe one day - more Mhz. Why new CPU when you haven't seen it higher clocked? It seems like wonder even in modest V2 where it doesnt show full potential (full FPU, full cache, more Mhz in V4)
 
 


Gunnar von Boehn
(Apollo Team Member)
Posts 4964
21 Oct 2020 08:33


Michael Piano wrote:

Gunnar,
   
I know this is question is ahead of the game but is the 68080 now the end of the line for 68k? 

   
The 68080 is in many ways internally similar to the 68060.
You can think of the "080" as big brother of the "060".
   
We tried to improve in the 68080 all the known "short comings" of the 68060.
-The 68060 can not execute some instructions in the 2nd pipe.
  We improved this.
-The 68060 has a big performance problem with longer instructions
  We fixed this.
-The 68060 is slow and weak in Bitfield instructions.
  We fixed this.
 
Many of the short comings Motorola actually planned to improve with a "68070" but this never came to market.
   
We also added modern feature like better memory controller and SIMD instructions which we believe Motorola would have added too - if they would have continued the 68k line.
   
I think that Motorola would have created a CPU very much like our 68080, a few years after the 68060 if they would have continued with 68k.
 
 
In gfx/video/pixel/game operations the 68080 can reach today already about 10 times the performance of an 68060@50Mhz.
 
68080 is clearly the best 68k CPU available today and allows you now to run software the Amiga never had the performance for.

I think now is the time for more software using this potential.

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